Call for Papers: Special Issue on Compute Express Link (CXL)

Transactions on Computers seeks submissions for this upcoming special issue.

Publication: 1 March 2026

IEEE Transactions on Computers seeks original manuscripts for a special issue/section on Compute Express Link (CXL) scheduled to appear in March 2026.

The Compute Express Link (CXL) is an open, industry-standard interconnect designed for connecting diverse processing units (e.g., CPU, GPU, accelerators), heterogeneous memory, and I/O devices (e.g., smart NICs). Over three generations, CXL has transformed from a single-domain connection to a rack-level interconnect, addressing four key challenges: (i) enabling efficient heterogeneous computing through coherent access to both system and device memory, (ii) addressing the challenges of memory wall by providing bandwidth and capacity expansion, (iii) pooling resources like memory and accelerators to minimize underutilized resources in data centers, and (iv) enabling fine-grained data sharing in distributed systems. CXL-connected products such as CPUs, memory, FPGAs, and NICs are already being widely deployed in commercial systems. Over the last five years, both industry and academia have conducted extensive research into CXL's applications. This special issue of IEEE Transactions on Computers invites articles exploring a wide range of topics related to CXL, its influence on future architectures, platforms, memory subsystems, software stacks, and innovative applications. Topics involving CXL include, but are not limited to:

Heterogeneous computing
Networking and Distributed Systems
Memory Tiering and Near Memory Compute
Pooling and Sharing Resources
Platform level performance, power, and total cost of ownership
Software Infrastructure
Application Level Enhancements

Submission Guidelines

For author information and guidelines on submission criteria, please visit Author Guidelines. Please submit papers through the Author Portal, and be sure to select the special-issue or special-section name. Manuscripts should not be published or currently submitted for publication elsewhere. Please submit only full papers intended for review, not abstracts, to the ScholarOne portal.

In addition to submitting your paper to IEEE Transactions on Computers, you are also encouraged to upload the data related to your paper to IEEE DataPort. IEEE DataPort is IEEE's data platform that supports the storage and publishing of datasets while also providing access to thousands of research datasets. Uploading your dataset to IEEE DataPort will strengthen your paper and will support research reproducibility. Your paper and the dataset can be linked, providing a good opportunity for you to increase the number of citations you receive. Data can be uploaded to IEEE DataPort prior to submitting your paper or concurrent with the paper submission. Thank you!

Guest Editors

Please address all other correspondence regarding this special issue/section to Lead Guest Editor (ddassharma@yahoo.com).

Debendra Das Sharma, Intel Corporation, Santa Clara (USA) Gustavo Alonso, ETH, Zurich (Switzerland) Guangyu Sun, Peking University (China)